The invention relates to a semiconductor substrate structure, and more particularly to a semiconductor substrate having a silicon-on-insutator structure and a method of fabricating the same.
With respect to semiconductor devices made of silicon, the silicon-on-insulator (SOI) structure is important for improvements in a high speed performance, a high reliability and a high withstand voltage. The silicon-on-insulator (SOI) structure which has been formed thereon with a semiconductor integrated circuit device permits the circuit device to exhibit the high speed performance, the high reliability and the high withstand voltage.
In recent years, a wafer bonding method has been employed to form the silicon-on-insulator (SOI) structure. In this wafer bonding method, a bonded wafer which has been formed with an insulator film at its one or opposite surfaces is bonded with a base wafer by using a heat treatment such as annealing. Generally, the wafer bonding method permits a low density of crystal defects which are generated in the bonded mono-crystalline silicon wafer formed on the insulator film. Further, the wafer bonding method permits a low cost manufacture of the silicon-on-insulator (SOI) structure. One of the wafer bonding methods is disclosed in "Proceeding of the 4th International Symposium on Silicon-on-Insulator Technology and Device", 1990, pp. 61-71.
A conventional wafer bonding method will be described with reference to FIGS. 1A to 1C.
As shown in FIG. 1A, a first silicon substrate 16 which has been doped with a p-type dopant such as boron is prepared. The doped first silicon substrate 16 has a specific resistance of 10 ohm.multidot.cm. An entire surface of the first silicon substrate 16 is so oxidized that a dioxide silicon film 17 having a thickness of approximately 5000 angstroms is formed on the entire surface of the first silicon substrate 16.
As shown in FIG. 1B, a second silicon substrate 18 which has been doped with the p-type dopant such as boron is also prepared. The second silicon substrate 18 has a specific resistance of approximately 15 ohm.multidot.cm. The first and second silicon substrates 16 and 18 are contacted through the insulator film 17, after which a heat treatment of the device is accomplished in a nitrogen atmosphere for an hour at a temperature of 1100.degree. C. This results in that the first and second silicon substrates 16 and 18 are bonded through the insulator film 17.
As shown in FIG. 1C, an opposite surface to the dioxide silicon film 17 formed on the first silicon substrate 16 is subjected to a mirror polishing so that the first silicon substrate 16 is made into a mono-crystalline silicon layer 19 having a thickness of 5 micrometers.
Other conventional wafer bonding method will subsequently be described with reference to FIGS. 2A to 2C.
As shown in FIG. 2A, a first silicon substrate 16 which has been doped with an n-type dopant such as arsenic or phosphorus is prepared. The doped first silicon substrate 16 has a specific resistance of 15 ohm.multidot.cm. An entire surface of the first silicon substrate 16 is so oxidized that a dioxide silicon film 17 having a thickness of approximately 2000 angstroms is formed on the entire surface of the first silicon substrate 16.
As shown in FIG. 2B, a second silicon substrate 18 which has been doped with the n-type dopant such as boron is also prepared. The second silicon substrate 18 has a specific resistance of approximately 20 ohm.multidot.cm. The first and second silicon substrates 16 and 18 are connected through the insulator film 17, after which a heat treatment of the device is accomplished in a nitrogen atmosphere for an hour at a temperature of 1100.degree. C. This results in that the first and second silicon substrates 16 and 18 are connected through the insulator film 17.
As shown in FIG. 2C, an opposite surface to the dioxide silicon film 17 formed on the first silicon substrate 16 is subjected to a mirror polishing so that the first silicon substrate 16 is made into a monocrystalline silicon layer 19 having a thickness of 3 micrometers.
In the conventional silicon-on-insulator structure fabricated by the above described wafer bonding methods, the monocrystalline silicon layer 19 is electrically separated from the second silicon substrate 19 serving as a base wafer through a dioxide silicon film 17 serving as an insulator film. Thus, a semiconductor integrated circuit is generally formed only on the monocrystalline silicon layer 19. The second silicon substrate 18 serving as a base wafer is not available as an active region to be formed thereon with any integrated circuit device. The first silicon layer 19 only is available as an active region to be formed thereon with an integrated circuit device. It is desirable that the silicon-on-insulator structure has double silicon substrates sandwiching an insulator film, both of which are available as active regions to be formed thereon with semiconductor integrated circuit devices. A development of such silicon-on-insulator structure having the active double silicon substrates permits a novel and attractive semiconductor integrated circuit device to be realized.
In addition, in the fabrication processes, the conventional silicon-on-insultor structure do not allow a gettering process to be applied to the fabrication processes, although it is applicable to fabrication processes for other semiconductor devices such as bulk semiconductor devices. The gettering process is important to allow the semiconductor device to exhibit excellent performances. The gettering is able to remove undesirable heavy metal impurities from an interior of the semiconductor device to a region outside the active region. The gettering process is generally accomplished by a high temperature heat treatment thereby removing the heavy metal impurity. The semiconductor device fabricated through the gettering process is able to exhibit an excellent property, because the active region of the device has no heavy metal impurity. It is, thus, desired to develop a novel silicon-on-insulator structure which makes a gettering process applicable so as to realize an excellent device performance.